High-mode self-oscillating pulse modulator

ABSTRACT

The invention relates to a high-mode self-oscillating pulse modulator. According to the invention, a complete rethinking of preconditions for oscillation and modulation in an oscillating modulator as all conventional thinking of how to apply oscillation in a modulator has been set aside. Thus, according to the invention, high-mode oscillation refers to an oscillation at a higher mode than the first mode, which is conventionally regarded as the one and only applicable mode in an oscillating modulator.

FIELD OF THE INVENTION

The invention relates to a self-oscillating pulse modulator according toclaim 1.

BACKGROUND OF THE INVENTION

A pulse modulator is a central element of many power conversion systems.Most switching power converters are based on Pulse Width Modulation(PWM) as means to control efficient conversion between domains (DC orAC). Pulse modulators are broadly applied in several contexts, low-powerconversion contexts included.

Within the field of e.g. PWM a typical converter may include a PWMmodulator, a filter and a control system. A prior art system of thistype is described in U.S. Pat. No. 4,724,396 and by Mr. Attwood inJournal of the AES, November 1983. p. 842-853. However, PWM has a rangeof shortcomings also well known to the art, mainly due to theimplementation of the carrier generation. This limits the systembandwidth and complicates design. Also, a stable and robust controlsystem design is difficult.

In order to overcome the limitations of this type of modulators,modified versions of pulse width modulators have been introduced. Thesemodulators generally benefit from the fact that the switching rate ofthe modulator is established by an oscillation in a non-linearity in theforward path of the modulator together with a feedback loop arrangement.

An example of such a pulse width modulator applied in connection with aswitching power stage is e.g. described and explained in PCT/DK97/00497.One of the features of such a modulator is that the need for a carriersignal is eliminated.

A problem related to a pulse width modulator of the above-mentioned typeis, however, that the switching rate and the effective feedback loopsarrangement are mutually constrained. Such constraining may e.g. becounteracted partly by complex filter topologies or e.g. application ofa relatively high switching rate. This restriction leads to differentquite complex considerations with respect to the loop filter andmoreover a restriction with respect to the effective suppression oferrors in the oscillating modulator.

SUMMARY OF THE INVENTION

The invention relates to a high-mode self-oscillating pulse modulator.

According to the invention, a complete rethinking of preconditions foroscillation and modulation in an oscillating modulator as allconventional thinking of how to apply oscillation in a modulator hasbeen set aside. Thus, according to the invention, high-mode oscillationrefers to an oscillation at a higher mode than the first mode, which isconventionally regarded as the one and only applicable mode in anoscillating modulator.

A self-oscillating pulse modulator designates in general a pulsemodulator wherein a non-linearity of the pulse modulator is included inthe oscillating circuitry. This technique is generally a counterpart toconventional modulation where a modulation is related to a specificseparately added modulation signal. An example of such technique is apulse width modulator where an input signal is modulated with respect toa carrier signal, e.g. a square or triangle reference wave signal.

A self-oscillating pulse modulator may furthermore include lock orsynchronization means in order to control or at least maintain thefrequency of the modulator oscillation.

Different methods of designating oscillating modulators have beensuggested in the prior art. Thus, some refer to an oscillating modulatoras a self-oscillating modulator and some refer to the modulators ascontrolled oscillating modulators (COM).

Generally, according to the provisions of the present invention it maybe said that the modulator itself is a part of an oscillating circuitryand that the established oscillating circuitry in turn forms anessential part of the modulator.

A further advantageous feature of a high-mode pulse modulator accordingto the invention is that the switching characteristics may be designedand determined relatively freely with few restrictions. As an example,the main switching frequency may be obtained by a proper design of afilter arrangement of the loop. In other words, a high-mode oscillatoroffers high suppression of errors together with a freedom, by properdesign of filter characteristics, to choose and obtain the desired modeof operation e.g. with the same hardware structure as a conventionalself-oscillating modulator.

In an embodiment of the invention, the pulse modulator comprises anactive pulse modulator.

According to a preferred embodiment of the invention, a pulse modulatordesignates that the modulator and the oscillator is established ascircuit comprising of discrete elements. Evidently, such discreteelements may comprise elements of a digital implementation and alsoanalog components. Generally, such circuit may be regarded to be activein contrast to e.g. conventional mechanical oscillators.

Moreover, it should furthermore be noted that a pulse modulatoraccording to the invention may or may not feature further simultaneousmodes or at least further harmonics, etc. as long as the main aim isobtained, namely a desired modulation.

In an embodiment of the invention, the oscillating modulator is a pulsewidth modulator.

According to a preferred embodiment of the invention, the modulator is apulse width modulator (PWM).

In this context it should be noted that PWM covers several differenttypes of variations, such as NPWM, LPWM, etc. A PWM of an embodiment ofthe invention utilizes a very broad banded feedback as error attenuationcombined with the PWM modulation of the input signal. Evidently,according to the invention, several other self-oscillating topologiesmay be applied within the scope of the invention with further signalpaths.

According to an embodiment of the invention, an oscillation mode refersto the order of zero crossing of the phase margin or alternatively thecrossing of the 360° phase shift of the open loop oscillator filter. Inother words, the first zero crossing may be referred to as a first mode,the second zero crossing may be referred to as a second mode and soforth.

Thus, a third mode oscillating pulse width modulator according to anembodiment of the invention features an oscillation defined by the thirdzero crossing.

In an embodiment of the invention, the pulse width modulator is a modetwo or mode three oscillator.

According to an advantageous embodiment of the invention, an oscillationis established in the transition where the phase margin of the modulatoroscillator goes from positive to negative at the first mode or secondmode above the fundamental mode, namely the second or third mode.Operation in this mode features an advantageous resulting loop gain inthe utility band of the modulator at a desired switch frequency.

In an embodiment of the invention, the high mode margin is less than 800kHz, preferably less than 500 kHz and most preferably less than 400 kHz.

In an embodiment of the invention, the high mode margin is less than 75%of the switch frequency at a switching frequency of at least 10 kHz.

In an embodiment of the invention, the high mode margin is less than 75%of the switch frequency at a switching frequency of at least 200 kHz

In an embodiment of the invention, the high mode margin is less than 50%of the switch frequency at a switching frequency of at least 200 kHz

In an embodiment of the invention, the high mode margin is less than 25%of the switch frequency at a switching frequency of at least 200 kHz

According to a preferred embodiment of the invention a high mode marginshould be not more than 25% at a switch frequency of higher than 200 kHzin order to obtain very advantageous modulator properties inhigh-demanding applications such as audio applications.

In an embodiment of the invention, the oscillating modulator comprisesan input, an output, at least one forward path and at least one feedbackpath,

said at least one forward path comprising at least one non-linearity,said at least one feedback path comprising a loop-filter arrangementsaid oscillating modulator having a switching frequency which isestablished on the basis of oscillation in said at least non-linearityand said loop-filter arrangement, wherein said switching frequency isestablished at the second or higher zero crossing of the phase margin ofthe open loop filter.

According to the invention, a switch frequency is obtained at afrequency higher than conventional self-oscillating modulators therebyobtained a steep slope of the effective loop filter as the effectivefilter order of the loop filter may be increased without requiring thatthe first zero order crossing defines the switch frequency.

An important prerequisite of the invention is that the conventionalrequirements with respect to the above-described first zero crossing,i.e. the requirement of maintaining a positive phase margin may bedisregarded while still maintaining a stable pulse width modulator.

The general principle of allowing oscillation at a zero crossing of thephase margin of the open loop filter may be advantageously applied e.g.in the analog domain e.g. in connection with a power switching amplifieror in the digital domain—or in the transition between the analog and thedigital domain—in connection with e.g. an A/D-converter.

A loop-filter arrangement will, according to the claimed invention,generally refer to any electrical conversion performed between theoutput and the input of the non-linearity in the feedback path. Thus,the loop-filter arrangement may comprise a dedicated loop filterdesigned according to predefined specifications in one or several pathsor even further non-linearities and moreover the loop-filter arrangementmay include different physical properties of the feedback path in itscomplete extent reflecting the non-ideal properties of the involvedcomponents or signal processing properties.

The at least one non-linearity may comprise any suitable non-lineardigital or analog section or circuit and may e.g. comprise a comparator,a hysteresis section of circuit, a limiter or any combination thereof.

In an embodiment of the invention, said loop filter has a negative phasemargin.

In an embodiment of the invention, the oscillating modulator comprisesan input, an output, at least one forward path and at least one feedbackpath,

said at least one forward path comprising at least one non-linearity,said at least one feedback path comprising a loop-filter arrangement,said modulator further comprising a lock signal generator or a locksignal input,said oscillating modulator having a switching frequency which isestablished on the basis of oscillation in said at least non-linearityand said loop-filter arrangement combined with a lock signal generatedby said lock signal generator or a lock signal input.

In an embodiment of the invention, the pulse modulator comprises amode-selector.

According to an embodiment of the invention, a mode selector may beapplied in connection with e.g. start-up, to ensure that the desiredmode is reached.

In an embodiment of the invention, the pulse modulator comprises modelocking means.

According to an embodiment of the invention, mode locking means may beapplied for the purpose of maintaining the oscillation of the pulsemodulator in the desired mode. In many contexts such mode locking meansshould simply ensure that a pulse modulator returns to the desired modeif sudden mode changes occur. In other contexts such mode locking meansmay imply preventing occurrence of undesired modes.

Mode locking means may e.g. comprise mode-canceling means, i.e.filtering means, linear or non-linear removing specific components atone or several undesired modes in order to prevent an oscillation.

Typically, an oscillation should be obtained at one only in order toobtain the desired modulation and noise suppression.

In an embodiment of the invention mode locking means comprises a modeselector controlled at least partly by a mode detector.

According to an embodiment of the invention, mode locking means may beapplied for the purpose of maintaining the pulse-modulator oscillationin the desired mode by a continuous monitoring of the mode by the modedetector. If a mode change occurs or is expected to occur a modeselector may be triggered for the purpose of actively returning thepulse modulator to the desired mode or counteracting the undesired driftof the pulse modulator.

In an embodiment of the invention, the pulse modulator is a multimodemodulator.

According to an embodiment of the invention, said multimode oscillatoris able to switch in at least two different modes. This feature mayenable the modulator to switch e.g. in the normal first mode asconventional oscillating modulators and shift into a higher mode whenhigher quality is desired or required.

According to a further embodiment of the invention, the pulse modulatormay comprise a multimode modulating oscillation which may actively,typically automatically according to predefined algorithms, be selectedto e.g. minimize the energy consumption under certain conditions andoptimize the pulse modulator quality under other conditions.

In an embodiment of the invention, the non-linearity comprises a limiteror a comparator.

According to the invention, a non-linearity is required for obtainingthe desired combination of oscillation and modulation as obtained byself-oscillating modulators. Note that the soft-clipping arrangement isalso regarded as a limiter and a non-linearity, although the illustratedtwo clipping levels are basically only reached at infinite. Evidently,several other limiter characteristics may be applied within the scope ofthe invention.

In an embodiment of the invention, the loop-filter arrangement comprisesa loop filter and that the effective order of said loop filter isgreater than 2 below switching frequency.

According to an advantageous embodiment of the invention, the order ofthe loop filter is 2 or greater in the band where such high order offersbenefits with respect to error suppression, namely below switchingfrequency of the pulse modulator.

In an embodiment of the invention, the effective order of said loopfilter is 3.

In an embodiment of the invention, the self-oscillating pulse modulatorcomprises rescue means and mode detecting means and wherein said rescuemeans suppresses or cancels unwanted modes detected by said modedetecting means.

In an embodiment of the invention, the self-oscillating pulse modulatoris digitally implemented.

In an embodiment of the invention, the self-oscillating pulse modulatoris implemented as an analog circuit.

According to a very advantageous embodiment of the invention the highmode principles may even be implemented in a analog representation of athe modulator by means of well-known analog components, thereby offeringthe extreme benefits of the inventions into an analog implementationsuch as a switching power stage without invoking any significantside-effects into the circuit. This is a significant benefit as analogcircuits, as well-known, possesses several non-ideal and limitingproperties which may often restrict or make the specific applicationsimpossible compared to their digital counterparts.

Moreover, it has been established that the modulator may even be appliedand fully utilized in high voltage or high power applications.

In an embodiment of the invention, the self-oscillating modulatorcomprises a switching stage.

In an embodiment of the invention, the self-oscillating pulse modulatoris applied in audio processing circuitry.

In an embodiment of the invention, the self-oscillating pulse modulatoris applied as power pulse width modulator.

In an embodiment of the invention, the modulator comprises means ofkeeping the switching within a certain range or constant.

A certain drifting of the switching frequency of oscillating modulatorsmay often be observed. The drifting may be accepted in some applicationsas the drifting has little or in principle no effect on the quality ofthe modulator. It may, however, be preferred to keep the switchingfrequency stable in order to prevent e.g. crosstalk.

In an embodiment of the invention, the modulator comprisessynchronization means.

The synchronization may e.g. be established by means of reference pulsesgenerator by an oscillator or a pulse generating circuit having thedesired switching frequency. Moreover such frequency synchronization maycomprise a frequency control which may be a circuit controlling the loopdelay, or variants of the embodiment of FIG. 3. Furthermore, thefrequency control may comprise a variable loop delay positioned in thesignal forward path of the modulator instead of, or in addition to, inthe feedback path.

Moreover, the synchronization means may be formed by a combination ofadded periodic signals and frequency control obtained through control orcompensation of modulator loop delay.

In an embodiment of the invention, the modulator forms part of amulti-channel modulator circuitry.

According to an advantageous embodiment of the invention, theoscillating modulator forms part of a multi-channel circuitry, e.g.formed by five or six high-mode oscillating modulators.

In an embodiment of the invention, the modulator forms part of amulti-channel modulator circuitry and wherein the switching frequency ofthe modulators are synchronized, either in a mutual synchronization orin relation to a common switching frequency reference.

According to an advantageous embodiment of the invention, theoscillating modulator forms part of a multi-channel circuitry, e.g.formed by five or six high-mode oscillating modulators and themodulators are synchronized with respect to switching frequency in orderto avoid crosstalk between the different channels of the multi-channelcircuitry.

In an embodiment of the invention, the oscillating modulator isimplemented as an analog circuit comprising an analog non-linearity andan analog feedback filter.

In an embodiment of the invention, the oscillating modulator isdigitally implemented in signal processing circuitry comprising adigitally implemented non-linearity and a digitally feedback filter.

In an embodiment of the invention, the oscillating modulator isimplemented as a hybrid digital and analog circuitry.

A hybrid implementation of a high-order modulator may e.g. comprise anA/D converter comprising an analog filter and an analog comparator andan A/D—and a D/A converter as a part of the feedback and forward path.

THE FIGURES

The invention will now be described with reference to the drawing where

FIG. 1 illustrates a principle model of a self-oscillating pulsemodulator,

FIG. 2A-2C illustrate different mode configurations within the scope ofthe invention,

FIG. 3 illustrates an analog to PCM converter according to an embodimentof the invention,

FIG. 4 illustrates the function of a variable loop delay when applied inthe system of FIG. 3,

FIGS. 5 and 6 illustrate the effect of a synchronization signal in asystem of FIG. 3,

FIG. 7 illustrates the filter characteristics of FIG. 3,

FIGS. 8 and 9 illustrate when the high-mode modulator is operated inhigh and low mode respectively in a multimode embodiment of a high-modemodulator according to an embodiment of the invention,

FIG. 10-13 illustrate an applicable loop filter structure and itscharacteristics of the oscillating circuitry of the modulator within thescope of the invention,

FIG. 14-16 illustrate a further applicable loop filter structure withinthe scope of the invention,

FIG. 17-20 illustrate different rescue structure according toadvantageous embodiments of the invention,

FIG. 21 illustrates a further applicable model of the modulatoraccording to the invention,

FIGS. 22 a and 22 b illustrate an analog embodiment of the invention andwhere

FIG. 23 illustrates the filter characteristics of the embodiment of FIG.22 b and the resistors C1 and R8.

DETAILED DESCRIPTION

Self-oscillating modulators have found some use over the recent years,but the use of such modulation techniques has up until now beenrestricted to relatively few market segments.

Examples of such self-oscillating modulators are WO 00/42702, WO02/25357, WO 02/093973, U.S. Pat. No. 6,118,336, WO 98/19391, WO00/27028, U.S. Pat. No. 6,249,182 hereby included by reference withrespect to different basic principles regarding the establishment andcontrolling of the desired oscillation in combination with the desiredmodulation. It is noted that according to the invention it is generallypreferred to apply a relatively high switch frequency in order to obtainnot only the desired oscillation but also very powerful noisesuppression obtained by the broad banded feedback path(s) of theself-oscillating modulator.

FIG. 1 illustrates an example of such a self-oscillating pulse widthmodulator.

From the beginning it should be noted that PWM in this context coversseveral different types of variations, such as NPWM, LPWM, etc. Theillustrated PWM modulator utilizes in a known way the very broad bandedfeedback as error attenuation combined with the PWM modulation of theinput signal. Evidently, according to the invention, several otherself-oscillating topologies may be applied within the scope of theinvention with further signal paths. Basically, the illustrated circuitshould rather be regarded as a principle model of a self-oscillatingmodulator.

The illustrated self-oscillating modulator comprises an input 12 guidingan input signal x(t) to a non-linearity represented by a comparator 10via a subtraction point 16 and compensating filtering means 11. Notethat the non-linearity may be obtained and represented by alternativemeasures such as limiters, etc. The comparator 10 delivers an outputpwm(t) on an output 14 of the circuit output. Moreover, this output isfed back to the subtraction point 16. The arranging of e.g. filteringmeans may be realized in several different ways, e.g. by inclusion offurther filtering means e.g. in further (not shown) feedback or forwardpaths. Note that the illustrated embodiment features a comparator 10having a variable voltage reference 17 instead of a fixed grounding inorder to keep the switch frequency within a certain desiredswitch-frequency interval independent or substantially independent ofthe frequencies of the input signal. The variable voltage reference maybe established in many ways within the scope of the invention, e.g. onthe basis of the amplitude of the input signal of the modulator. Anexample of one principle applied for this purpose is known from WO00/42702, hereby included by reference.

One way of looking at the modulator may be summed up: the open loopphase has to be approximately −360° at the desired switch frequency. Thecomparator will provide the gain. An example of a suitable filter H(s)may be illustrated in FIG. 2 where the switch frequency is approximately384 kHz.

It is noted that the feed-back path and the forward path may beoverlapping as the forward path in present embodiment refers to thepatch between the input 12 and the output 14 and that the feedback patch15 basically also includes the loop filter 11 which establishes thedesired switching conditions in the present application.

FIG. 2A illustrates a phase response of a self-oscillating pulsemodulator.

As previously described, a desired oscillation is conventionally reachedwhen the open loop phase reaches 360° and the loop gain is unitary.

In this context is should be noted that open characteristics of theoscillator refers to the theoretical open loop characteristics duringoscillation. Obviously, in practice, oscillation will only occur whenthe oscillation loop(s) is/are closed.

At the illustrated embodiment, a first mode mf1, invokes oscillation.

mfx designates the x'th mode, phase falling and mrx indicates the x'thmode, phase raising.

Initially, when looking at FIG. 2A is should be noted that thefundamental mode, the illustrated mode 1, if non-compensated, typicallydrifts during operation primarily as a function of modulator inputamplitude.

Thus, the illustrated first mode, mf1, will tend to move to the left asillustrated towards lower frequencies when the input amplitude isincreased.

Turning now to FIG. 2B, a characteristic of a multimode oscillatingpulse modulator according to an embodiment of the invention isillustrated.

Again, oscillation at the fundamental mode ml may be reached.Oscillation may moreover be obtained at one of the further modes, e.g.mf3, i.e. a high-mode oscillation.

In other words, oscillation may, according to the invention be obtainedin a high mode. In the illustrated embodiment oscillation is preferredin high falling modes, e.g. mf3 and mf5.

FIG. 2C illustrates a further embodiment of the invention, where afurther embodiment of the invention involves an embodiment where ahigh-mode oscillation may be obtained in the second mode, mf2.

FIG. 2D illustrates a further schematic illustration corresponding tothe illustrated embodiment of FIG. 8.

A more detailed explanation of some implementations of the aboveprinciples of different embodiments of the invention will be givenbelow. Evidently, several other applications may be establishedaccording to the general principles of the present invention.

The modulator according to the invention may e.g. be applied in acontext where the modulator is applied as an A/D converter and thesignal must be sampled somewhere in the loop. The sampling may beobtained by a cheap 1 bit A/D converter simply consisting of orcomprising a latch. This time quantization in the PWM signal can bedirectly compared to amplitude quantization in a PCM A/D converter, sothe latch has to be clocked many times faster than the PWM switch rate.An advantageous property of the system is that the loop errors areattenuated by the loop gain—including this quantization noise.

Referring now to an important aspect of the above illustratedembodiments of the invention a further feature of important high-modeself-oscillating principles will be explained and outlined.

This design feature of a high-mode oscillator will result in extremelyadvantageous performance if applied as below described. In order toobtain the desired advantageous performance, a high-mode margin must beidentified and design carefully. According to the terms of theinvention, the high mode margin refers to the difference in frequencybetween the high mode in which the oscillator switches and the previousmode.

Thus, if the example of FIG. 2 c is intended to switch in mode mf2, thehigh-mode margin is given by high-mode margin=mf2−mr1.

It has been established that a major benefit of the invention obtainedwhen the high-mode margin is less than 150 kHz at a high mode switchfrequency of e.g. 200 kHz.

Generally it has been established that the high-mode margin should beless than 75% of the switch frequency of the high mode.

It has also been established according to the invention that suchhigh-mode margin may be obtained relatively simple by keeping themaximum change of open loop phase between the high-mode switching modeand the previous mode as explained above must be less than about 90°.This designation of phase shift refers to the difference in phasebetween the high mode/previous mode (at 360° crossing) and the“mountain-top” phase of FIG. 2 c.

In an analog implementation of the invention this phase shift should beless than 90° but preferably as low as about 50°. In a preferred analogembodiment of the invention this phase shift should be about 30°.

In a digital implementation this phase shift should preferably be lessthan 30°.

FIG. 3 illustrates an example of such an A/D converter, according to anembodiment of the invention. The illustrated converter comprises aninput 132, which via a subtracting point 136 and filtering means 131 isfed to a comparator 130. The output of the comparator 130 is fed to alatch 137, which again outputs a time-quantized signal via adifferentiator 140 to a down sampling circuit 139 outputting a PCM downsampled signal. The output of the latch is furthermore fed back andadded to the input 132.

The feedback path comprises a frequency control 138 for fixation ofswitch frequency or at least for obtaining a steady switch frequency.When the switch frequency is allowed to fluctuate it may causeinterference problems when, e.g. several self-oscillating A/D-convertersare implemented on a single printed circuit board, or close to eachother. Furthermore a stable switch frequency facilitates synchronizationof several converters. It comprises a frequency estimator FEL, amultiplexer MUX and a shift register. The shift register receives theoutput values from the latch, e.g. as in a first-in-first-out FIFOregister, and thus retains information about an appropriate number ofthese values. The specific number of values that should be remembereddepends on the particular embodiment, and may correspond to, e.g. thenumber of values established by the latch within a fraction of a switchperiod, in principle within ½ of a period of the desired switchfrequency and more practically usable within, e.g. 1/10 of a period ofthe desired switch frequency. For each latch output value, the oldestvalue in the shift register is discarded. The frequency estimator FELmonitors the switch frequency by monitoring the output of the latch, andcontrols, by means of the multiplexer MUX, which of the retained outputvalues that should be fed back to the input 132. The frequency control138 is thereby able to vary the loop delay, i.e. the time by which theoutput values are delayed before fed back to the input 132, which againresults in a variation of the switch frequency. The self-oscillationswitch frequency in this embodiment is thus basically determined by thefiltering means 131 in combination with the frequency control 138. Thisdesign is basically applied for the purpose of counteracting theinfluence of variations of the input amplitude on the switch frequency.

It is noted that the specific embodiment of a frequency control shown inFIG. 3 may be substituted by any possible means for controlling the loopdelay, or variants of the embodiment of FIG. 3. Furthermore, thefrequency control, i.e. a variable loop delay, may be positioned in thesignal forward path instead of, or in addition to, in the feedback path.

FIG. 3 further comprises additional inputs s1(t) and s2(t). These mayalso be used for controlling or influencing the switch frequency. Byapplying to one of these inputs a periodic signal or a harmonic relatedthereto, preferably a square wave but any waveform type or compositetype may be used, having a frequency equal to the desired switchfrequency, this periodic signal is added to the input signal x(t) orfiltered input signal y(t). This again causes the switch frequency ofthe self-oscillating loop to substantially stick to the frequency of theadditional input signal s1(t) or s2(t). The additional signal may havean amplitude of, e.g. 5% of the maximum input signal amplitude.Preferably only one additional input should be used, but FIG. 13 showsdifferent preferred positions to apply this input. It should be notedthat applying the additional periodic signal anywhere else in thecircuit is, however, within the scope of the present invention notpreferred.

When both the variable loop delay, e.g. controlled by the frequencycontrol 138, and the additional periodic signal s1(t) or s2(t) areapplied in one embodiment, the primary purpose of the variable loopdelay is to maintain the switch frequency within a tolerance, i.e.roughly locking the frequency, whereas the primary purpose of theadditional periodic signal is to restrict this tolerance further, i.e.preferably completely lock the switch frequency.

The above-explained A/D-converter benefits from a fixed and “lockable”switch rate. A fixed switch rate will make the system more immune toneighboring channels, and will make the down sample task easier.

As mentioned earlier, the oscillation frequency is determined on thebasis of the open loop phase response. This phase response alsoincorporates the delay in the comparator and the spread in analogcomponents parameters, so the exact switch frequency may be difficult topredict unless measures for locking switching frequency is applied. Thisfeature is both relevant with respect to the analog and digitalimplementation. Furthermore, the oscillator circuit itself will reducethe switch frequency for high-level input signals.

An adaptive adjustment of the loop phase response of the above explainedtypes enables switch frequency corrections as the switch frequency ismonitored, and as a function of the switch frequency, the delay (phase)is adjusted. If the switch frequency is too high, the delay isincreased, thus moving the −180° cross point to the left. If the switchfrequency is too low, the delay is decreased, thus moving the −180°cross point to the right. An example of the delay change consequence isillustrated for explanatory purposes in FIG. 4 where phase response Pand open loop gain G is illustrated as a function of the digital delay,i.e. the settings of the MUX 138 settings.

Although this frequency adjustment is only made with certain accuracylimited by the time resolution and therefore only offers a “coarse”adjustment, a small synchronization signal with the desired switchfrequency will tend to “lock” the free-running oscillator.

An example of the lock effect in the frequency domain is shown in FIG. 5and FIG. 6, the input signal, x(t), is a 6.4 KHz-20 dB sinusoidal andthe synchronization signal, s1(t) in FIG. 3 is a −26 dB 1.536 MHz squarewave. In other words, FIG. 5 illustrates a PWM output spectrum of FIG. 3without synchronization signal and FIG. 6 illustrates a PWM outputspectrum of FIG. 3 when a synchronization signal is applied.

It should be noted that the frequency control means 138 are optionalalthough very advantageous. Moreover, frequency control orsynchronization may be obtained in several other ways than the aboveillustrated.

It should moreover be noted that the desired high-mode oscillation maybe obtained by a suitable filter design of conventional self-oscillatingmodulators. Thus, the above-illustrated self-oscillating hardwarestructure of FIG. 3 may be designed to operate in both fundamentalmodes—as a conventional self-oscillating modulator—and in highmode—according to the present invention.

A loop filter in a self-oscillating modulator may generally be designedin many ways. A general rule of thumb is to have some phase margin untilthe desired switch frequency is reached. An example of such a design isshown in FIG. 7 illustrated by open loop gain G and open loop phase P.The illustrated loop filter in this example consists of:

1 simple pole at 5 kHz1 simple pole at 10 kHz1 simple zero at 130 kHz1 complex pole at 550 kHz, Q=0.75

The FFT result shown in FIG. 7 is the FFT of the latch output found inFIG. 3. In this case the MUX has been bypassed, so no extra delay isintroduced in the feedback. The clock rate in the simulations in thischapter is 20 MHz (50 ns). With a PWM switch frequency at 400 kHz (2.5us), that is equivalent to a time resolution of log 2(2.5e−6/50e−9)=5.64bit.

The conventional single-mode crossing corresponds to the designprinciples of FIG. 1B has some limitations in the slope oferror-suppression.

Turning now to a high-mode self-oscillating pulse modulator according toan embodiment of the invention

The following FIG. 8 to 16 show loop filter characteristics andillustrate that it is not only possible to apply high modes of theself-oscillating modulator, according to the invention, but also that itmay be possible to switch between different modes. This mode control maybe applied for different purposes. Gain is designated in the figures byG and phase by P.

The feature, that a self oscillating modulator is able to actively andunder control change between at least two different modes may, enablethe modulator to operate e.g. in a fundamental first mode asconventional oscillating modulators, LO-mode and change into a highermode when higher quality is desired or required.

Thus a multimode PWM may enable an oscillation in different selectablemodes which may actively, typically automatically according topredefined algorithms, be selected e.g. to minimize the energyconsumption under certain conditions and optimize the PWM quality underother conditions.

A high-mode self-oscillating pulse modulator may be obtained byincreasing the filter order so the phase-margin drops below zero degree,enables the possibility to have an even steeper slope of theerror-suppression curve. An example of such design is shown in FIG. 8.The illustrated high-mode modulator has three modes, thus enabling morethan one “operating frequency”. The illustrated embodiment oscillates inthe third mode mf3 at falling phase. The third mode enables oscillationat 400 kHz, i.e. a high “oscillating mode”.

Using the same algorithm, the PWM modulator can be brought into the “lowoscillating mode” mf1 by for example forcing the PWM output—which is fedback to the input—to a fixed state in a couple of hundred micro secondscorresponding to about 5000 clock cycles. When the PWM operates in thismode, the switch frequency is located at the fundamental model mf1 whichis located at approx. 10 kHz. It is noted that error-suppression effectin this mode is reduced and the effective 0 dB loop-gain frequency-pointhas been moved from 400 kHz to 10 kHz. The effect can be seen in FIG. 9.

The results in FIG. 8 and FIG. 9 have been obtained using a timediscrete loop filter having:

3 simple poles at 6 kHz1 complex zero at 75 kHz, Q=21 simple pole at 85 kHz

The filter is implemented as two cascaded second order IIR sections 1000as shown in FIG. 10. The input x is prescaled with 0.25, so that thefilter state values in normal operation is inside the range −1 to +1.

The second-order sectioning approach is used to reducecomponent/coefficient sensitivity and to reduce the output noise as afunction of internal noise sources such as resistors, transistors andquantization. In this case the 4^(th) order filter has been parted inthe two transfer functions shown in FIG. 11.

FIG. 12 illustrates a normal start-up applied when targeting the“HI-mode”.

In a normal start-up situation, the modulator will enter the “HI-mode”as shown in FIG. 12, where the PWM period time is close to 50 clockcycles corresponding to 400 kHz.

A way of switching between the high mode and the low mode is explainedbelow. The switching may be obtained by forcing the output latch of themodulator to a fixed state in a long period, i.e. a longer period thanthe desired rate. Initially, the modulator will oscillate in the highmode, i.e. for the first 1000 clock cycles. After that period the outputis forced to +1 for the following 5000 clock cycles. After these 5000cycles the output is released and it can be observed that the modulatorwill enter the LO mode at about 10 kHz.

The filter gain for both IIR sections 1000—biquads at this low frequencyare rather high (>30 dB), so the filter output signals have highamplitude, especially at the last stage where the signal is boosted by80 dB.

One way of disabling these unwanted low-frequency and high-amplitudeoscillations is simply to introduce non-linear elements in the loop,which only have an effect when the system tries to enter LO modes.

An example could be to introduce limiters 1400 in the loop filter asshown in FIG. 14. These limiters 1400 will reduce or remove thepossibility of unwanted low-frequency and high-amplitude oscillations.

It should be noted that this limiting strategy easily may be implementedin an analog version as well. Thus, such limitation may often occurautomatically due to limited supply voltage of the applied filtercircuit.

The result of applying limiters inside the filters when applying thesame setup as in FIG. 13 the switching is illustrated in FIG. 15 andFIG. 16.

Thus, after the “force period”, it is noted that the output signal ysignal is limited to first +1 and then −1. After these events, themodulator returns to the preferred HI mode.

FIG. 16 illustrates a zoomed returning to the HI-mode.

A feature of a further advantageous embodiment of the invention impliesthe application of a rescue mechanism. Evidently, as it will beunderstood, the term rescue mechanism refers to an electrical ratherthan a mechanical circuitry and that the term rescue merely refers to acircuitry applied for the purpose bringing the oscillating modulatorinto the desired switch condition.

FIG. 17 illustrates a first embodiment of such rescue mechanism.

The illustrated self-oscillating modulator comprises an input 172guiding an input signal x(t) to a non-linearity 170 via a subtractionpoint 176 and filtering means 171. Note that the non-linearity may beobtained and represented by alternative measures such as comparators,limiters, etc. The non-linearity 170 delivers an output pwm(t) on anoutput 174 of the circuit output. Moreover, this output is fed back tothe subtraction point 176 via a rescue block 179 controlled by a modedetector 178. The arranging of e.g. filtering means may be realized inseveral different ways, e.g. by inclusion of further filtering meanse.g. in further (not shown) feedback or forward paths. A latch 173 onthe output of the non-linearity 170 is optional.

The mode detector 178 monitors unwanted modes. The mode detector maye.g. simply be implemented as a counter that monitors the duration of aPWM pulse; here the length of a “+1 state” or length of a “−1 state”. Ifthe length exceeds the expected length of a PWM pulse running in thedesired mode, the mode detector 178 signals to the rescue block 179. Therescue block 179 may simply disconnect, tri-state, the feedback in agiven time period, thus suppressing the unwanted mode.

FIG. 18 illustrates a second embodiment of a rescue mechanism in ahigh-mode self-oscillating modulator, according to a furtheradvantageous embodiment of the invention.

The illustrated self-oscillating modulator comprises an input 182guiding an input signal x(t) to a non-linearity 180 via a subtractionpoint 186 and compensating filtering means 181. Note that thenon-linearity may be obtained and represented by alternative measuressuch as comparators, limiters, etc. The non-linearity 180 delivers anoutput pwm(t) on an output 184 of the circuit output. Moreover, thisoutput is fed back to the subtraction point 186.

A rescue block 189 is moreover controlled by a mode detector 188. Thearranging of e.g. filtering means may be realized in several differentways, e.g. by inclusion of further filtering means e.g. in further (notshown) feedback or forward paths. A latch 183 on the output of thenon-linearity 180 is optional.

The mode detector 188 monitors unwanted modes. The mode detector 188 maye.g. simply be implemented as a counter that monitors the duration of aPWM pulse; here the length of a “+1 state” or length of a “−1 state”. Ifthe length exceeds the expected length of a PWM pulse running in thedesired mode, the mode detector 188 signals to the rescue block 189. Therescue block 189 may obtain the desired mode-cancellation by e.g.resetting, discharging or limiting the filtering means 181.

FIG. 19 illustrates a third embodiment of a rescue mechanism in ahigh-mode self-oscillating modulator according to a further advantageousembodiment of the invention.

The illustrated self-oscillating modulator comprises an input 192guiding an input signal x(t) to a non-linearity 190 via a subtractionpoint 196 and filtering means 191. Note that the non-linearity may beobtained and represented by alternative measures such as comparators,limiters, etc. The non-linearity 190 delivers an output pwm(t) on anoutput 194 of the circuit output. Moreover, this output is fed back tothe subtraction point 196.

A rescue block 199 is moreover controlled by a mode detector 198. Thearranging of e.g. filtering means may be realized in several differentways, e.g. by inclusion of further filtering means e.g. in further (notshown) feedback or forward paths. A latch 193 on the output of thenon-linearity 190 is optional.

The mode detector 198 monitors' unwanted modes directly in the filteringmeans 191 and the mode detector 198 signals to the rescue block 199 ifundesired mode(s) are present. The rescue block 199 may obtain thedesired mode-cancellation by e.g. resetting, discharging or limiting thefiltering means 191.

One way of detecting an undesired mode is to monitor the amplitude ofthe filter states. If the modulator enters a LO mode, the amplituderises and the detector 198 can then send out a control signal to therescue block 199 which can reset, discharge or limit filter stage. Inboth of the above implementations, the mode detector as well as therescue block are implicit in the filter-limiting operation.

FIG. 20 illustrates a further embodiment of the implementation of arescue mechanism.

The illustrated self-oscillating modulator comprises an input 202guiding an input signal x(t) to a non-linearity 200 via a subtractionpoint 206 and filtering means 201. Note that the non-linearity may beobtained and represented by alternative measures such as comparators,limiters, etc. The non-linearity 200 delivers an output pwm(t) on anoutput 204 of the circuit output. Moreover, this output is fed back tothe subtraction point 206 via a rescue block 209 controlled by a modedetector 208. The arranging of e.g. filtering means may be realized inseveral different ways, e.g. by inclusion of further filtering meanse.g. in further (not shown) feedback or forward paths. A latch 203 onthe output of the non-linearity 200 is optional.

The mode detector 208 monitors unwanted modes directly in the filteringmeans 201 and controls the rescue block 209 accordingly. The rescueblock 209 may simply disconnect, tri-state, the feedback in a givenperiod of time, thus suppressing the unwanted mode.

In this example the mode detector monitors the filter states, or atleast some of them. One way of detecting an undesired mode is to monitorthe amplitude of the filter states. If the modulator enters a LO mode,the amplitude rises and the detector can then send out a control signalto the rescue block which can disconnect the feedback as FIG. 17.

Loop Filter Structure

All discussions in this document are based on the modulator model shownin FIG. 1A.

In especially an analog implementation, different physical limitationsmust be considered, like slew-rate in an op-amp. Often the signal has tobe band-limited before it reaches an active element like an op-amp, sothe filter structure can be changed to another applicable model asillustrated in FIG. 21.

The illustrated model of a self-oscillating modulator, according to theinvention, comprises an input guiding an input signal x(t) to anon-linearity 210 via a block F, a subtraction point and a block H. Thenon-linearity delivers an output y on an output. Moreover, this outputis fed back to the subtraction point via a block G. The non-linearitymay moreover be connected to a reference 217. Again, the variablevoltage reference 217 may be established in many ways within the scopeof the invention, e.g. on the basis of the amplitude of the input signalof the modulator. An example of one principle applied for this purposeis known from WO 00/42702, hereby included by reference.

This Model

When the non-linearity 210 is regarded as a linear gain k the transferfunction can be found as:

${Y = {{{X \cdot F \cdot H \cdot k} - {Y \cdot G \cdot H \cdot \left. k\Updownarrow\mspace{290mu} {Y\left( {1 + {G \cdot H \cdot k}} \right)} \right.}} = {{X \cdot F \cdot H \cdot \left. k\Updownarrow\mspace{281mu} \frac{Y}{X} \right.} = \frac{F \cdot H \cdot k}{1 + {G \cdot H \cdot k}}}}}\mspace{121mu} $

Seen from a stability and error suppression point of view, only G and Hare interesting. The output as a function of injected quantizationnoise, Q, is:

${Y = {{Q - {Y \cdot G \cdot H \cdot \left. k\Updownarrow\mspace{194mu} {Y\left( {1 + {G \cdot H \cdot k}} \right)} \right.}} = {\left. Q\Updownarrow\mspace{191mu} \frac{Y}{Q} \right. = \frac{1}{1 + {G \cdot H \cdot k}}}}}\mspace{31mu}$

The transfer function F only affects the input to output relation.

FIGS. 22 a and 22 b illustrate a further advantageous embodiment of theinvention now in an analog implementation.

FIG. 22 a illustrates the principle components of an analog implementedPWM modulator and FIG. 22 b illustrates an example of a specific filterarrangement of the PWM modulator of FIG. 22 a.

The illustrated embodiment, representing just one of several applicableanalog representations, comprises and input represented by a voltagegenerator V4 connected to a loop filtering arrangement FA via a resistorR1 and grounded by a capacitor. The filtering arrangement FA isconnected to the inverted input of a non-linearity NL, here comprised bya comparator.

The output of the comparator constitutes the output of the PWM.

The output is fed back to the input of the filtering arrangement FA viaa resistor R8.

R8 and R1 are 10 k and C1 is 15 n.

Turning now to FIG. 22 b, illustrated a specific topology of a filteringarrangement FA of FIG. 22 a, the input is basically based on twoserially coupled comparators 220 and 221 forming or forming part of alow-pass filtering circuit.

The components forming the low-pass filtering arrangement FA are listedbelow

R2 is 4 k7, R3 is 5600 k, R4 is 10 k, R5 is 680, R6 is 56 k, R7 and 1.8k (ohms).C2 is 4 p7, C3 and C4 are 820 p, C5 is 470 p and C6 is 100 p (farad).

FIG. 23 illustrates the resulting characteristics of the above-disclosedPWM filter arrangement of FIG. 22 b including the resistor R8 and thecapacitor C1, where G illustrates the amplitude and P designates theopen loop phase characteristic of the above circuit. It is noted thatthe illustrated analog embodiment in many ways corresponds to thedigital implementation of FIG. 8.

Applications of the above-explained pulse modulator includes high andlow power PWM, A/D and D/A converters, power stage control, powersupplies, etc.

1.-34. (canceled)
 35. High-mode self-oscillating pulse modulator whereinthe oscillating pulse modulator comprises an input, an output, at leastone forward path and at least one feedback path, said at least oneforward path comprising at least one non-linearity, said at least onefeedback path comprising a loop-filter arrangement said oscillatingmodulator having a switching frequency which is established on the basisof oscillation in said at least non-linearity and said loop-filterarrangement, wherein said switching frequency is established at thesecond or higher zero crossing of the phase margin of the open loopfilter.
 36. High-mode self-oscillating pulse modulator, wherein theoscillating pulse modulator comprises an input, an output, at least oneforward path and at least one feedback path, said at least one forwardpath comprising at least one non-linearity, said at least one feedbackpath comprising a loop-filter arrangement, said modulator furthercomprising a lock signal generator or a lock signal input, saidoscillating modulator having a switching frequency which is establishedon the basis of oscillation in said at least non-linearity and saidloop-filter arrangement combined with a lock signal generated by saidlock signal generator or a lock signal input.
 37. High-modeself-oscillating pulse modulator according to claim 35, wherein saidoscillating modulator is a pulse width modulator.
 38. High-modeself-oscillating pulse modulator according to claim 35, wherein saidpulse width modulator is a mode two or mode three oscillator. 39.High-mode self-oscillating pulse modulator according to claim 35,wherein the high mode margin is less than 800 kHz, preferably less than500 kHz and most preferably less than 400 kHz.
 40. High-modeself-oscillating pulse modulator according to claim 35, wherein the highmode margin is less than 75% of the switch frequency at a switchingfrequency of at least 10 kHz.
 41. High-mode self-oscillating pulsemodulator according to claim 35, wherein the high mode margin is lessthan 75% of the switch frequency at a switching frequency of at least200 kHz.
 42. High-mode self-oscillating pulse modulator according toclaim 35, wherein said loop filter has a negative phase margin. 43.High-mode self-oscillating pulse modulator according to any of the claim35, wherein said loop filter has a negative phase margin.
 44. High-modeself-oscillating pulse modulator according to claim 35, wherein saidpulse modulator is a multimode modulator.
 45. High-mode self-oscillatingpulse modulator according to claim 35, wherein said non-linearitycomprises a limiter or a comparator.
 46. High-mode self-oscillatingpulse modulator according to claim 35, wherein said loop-filterarrangement comprises a loop filter and that the effective order of saidloop filter is greater than two below switching frequency.
 47. High-modeself-oscillating pulse modulator according to claim 35, wherein theeffective order of said loop filter is three.
 48. High-modeself-oscillating pulse modulator according to claim 35, wherein saidself-oscillating pulse modulator comprises rescue means and modedetecting means and wherein said rescue means suppresses or cancelsunwanted modes detected by said mode detecting means.
 49. High-modeself-oscillating pulse modulator according to claim 35, wherein saidmodulator forms part of a multi-channel modulator circuitry and whereinthe switching frequency of the modulators are synchronized, either in amutual synchronization or in relation to a common switching frequencyreference.
 50. High-mode self-oscillating pulse modulator according toclaim 36, wherein said oscillating modulator is a pulse width modulator.51. High-mode self-oscillating pulse modulator according to claim 36,wherein said pulse width modulator is a mode two or mode threeoscillator.
 52. High-mode self-oscillating pulse modulator according toclaim 36, wherein the high mode margin is less than 800 kHz, preferablyless than 500 kHz and most preferably less than 400 kHz.
 53. High-modeself-oscillating pulse modulator according to claim 36, wherein the highmode margin is less than 75% of the switch frequency at a switchingfrequency of at least 10 kHz.
 54. High-mode self-oscillating pulsemodulator according to claim 36, wherein the high mode margin is lessthan 75% of the switch frequency at a switching frequency of at least200 kHz.
 55. High-mode self-oscillating pulse modulator according toclaim 36, wherein said loop filter has a negative phase margin. 56.High-mode self-oscillating pulse modulator according to any of the claim36, wherein said loop filter has a negative phase margin.
 57. High-modeself-oscillating pulse modulator according to claim 36, wherein saidpulse modulator is a multimode modulator.
 58. High-mode self-oscillatingpulse modulator according to claim 36, wherein said non-linearitycomprises a limiter or a comparator.
 59. High-mode self-oscillatingpulse modulator according to claim 36, wherein said loop-filterarrangement comprises a loop filter and that the effective order of saidloop filter is greater than two below switching frequency.
 60. High-modeself-oscillating pulse modulator according to claim 36, wherein theeffective order of said loop filter is three.
 61. High-modeself-oscillating pulse modulator according to claim 36, wherein saidself-oscillating pulse modulator comprises rescue means and modedetecting means and wherein said rescue means suppresses or cancelsunwanted modes detected by said mode detecting means.
 62. High-modeself-oscillating pulse modulator according to claim 36, wherein saidmodulator forms part of a multi-channel modulator circuitry and whereinthe switching frequency of the modulators are synchronized, either in amutual synchronization or in relation to a common switching frequencyreference.